So as far as I understand Random Access Memory lets us access any stored in it data regardless where it’s stored and with the same speed.
I just don’t understand what makes that physically possible. Data is being transfered through electrons at approximately the speed of light through the wires. But how do you connect the wires to access all of the data everywhere in RAM at the same time?
Is the data being broken down into bits over all the RAM units – making the data collection process longer as you have to gather all the data particles or is there something I’m missing.
If I got any of my facts wrong feel free to correct me.
In: 7
It doesn’t let you access everything at once. It lets you access anything in any order. So the computer can reference a given memory address without having to go through other addresses first.
The naming convention is very old. You ever watch an old movie with the giant computer servers that had the reels of magnetic tape spinning on the front? It comes from that era. Memory was accessed in sequence. If you wanted to move to a memory address the system had to move through all addresses between the current location and the location it wanted to get to (winding the magnetic tape while monitoring its position to reach the correct location).
The wire connections in ram are always present, but transistors act as switches to control whether an electric signal can travel down that line or not. The memory address corresponds to a physical location in the memory chip and the connections its attached to. By default the data lines to all memory addresses are off. When the computer wants to read an address it turns the lines for that location on, reads the data, and then turns them back off. It doesn’t need to cycle through all the memory addresses between the previous data call and the current data call though. The actual process is more complicated and happens extremely fast, but that’s the general gist of how its working.
First the speed of light is largely irrelevant here. The data is accessed at the same speed for all practical purposes.
Having a section 3mm further away take longer is more of a scientific technicality than a practical difference.
That said, RAM does not necessarily operate at the speed. A common example is laptops with 12GB of RAM – they use an 8GB and a 4GB module.
Part of RAM’s high speed is parallelism. The 4GB stick will be parallel to 4GB in the 8GB stick and they’ll work together in dual channel to achieve full speed.
4GB will remain in single channel and will be slower.
RAM also operates on a complex bus system that will nullify many of these technicalities.
I like to compare it to a subway/metro train system. For example if all the data has to get on a subway car and travel to the CPU, it doesn’t matter if they enter slightly faster or slightly slower because everyone on the train reaches the next station at the same time.
There are many kinds of latencies and delays and steps along the way. From paying, to getting a ticket, to the time it takes for the doors to open and shut, to the travel time.
For example an AMD CPU might have an infinity fabric speed of 1,600 MHz with 3,200 MHz RAM. Here the RAM will dump two train loads of data at the I/O die’s memory controller, and then transfer onto a new train to the CPU. Maintaining this 2:1 ratio yields optimal performance.
Lastly, RAM traces on motherboards have zig-zags in them to maintain constant length to help with high speed signal integrity:
https://preview.redd.it/kkor7dcawu751.jpg?auto=webp&s=60a299a2d44a54a2fc975a9caa9ebcbda3bb16e8
These are carefully planned so all the traces are the same length.
It’s actually very simple – RAM just prolongs the time for close cells, until it matches the time for furthest cells. So it always waits the “longest sure time”, even if it’s not necessary.
It might be possible to read close cells faster, but it’s just not worth the extra hardware.
Lets step back to olden times when they called RAM “core” memory, back in the 60s. Back then each “bit” of memory was a literal iron ring. If you recall from high school science, if you wrap a wire around a piece of metal you can induce a magnetic charge in it. If you make that piece of metal a ring, the magnetic charge will persist in it. So each bit would have a wire to charge it (make it a 1), another to discharge it (make it a 0) and a wire to read whether its a 1 or a 0.
Now, each bit of RAM is the same type of thing, but instead of a physical iron core, its a collection of logic gates made out of transistors. THe problem with transistor circuits is that they’re essentially analog (at this level anyway). And you need a constant supply of electricity to make them run: they work on the principal of using one small flow of electrons to enable or disable a much larger flow of elections (the ones that hold a 1 or 0 value). Some electrical components like capacitors can receive and hold a charge, but those are big and they don’t work fast enough for our purposes here.
So essentially every bit of RAM needs to be constantly refreshed or driven by a small trickle of electricity for its value to be maintained. Compared to the massive electron flows required to actually process instructions and data in a CPU or a GPU, this is relatively minor – thus portable computers have sleep mode; essentially the contents of RAM remain but everything else shuts off.
So now we come to how the memory is “read”. RAM is addressed in entire bytes (actually much larger than this, in multi-byte words etc. but whatever). TO read the bytes at the address you want you simply provide the address in question to your memory chip. THe electrons of the address you provide enable or disable a circuit connection that connects the source 3 or 5V DC from the power supply to the invidiual bit circuits; if that bit is a 1, the 3/5V of the power supply will flow through to the corresponding input/output line where you’re reading the value of that bit _from_. To read a different memory address, simply change the 1’s and 0’s of the address on your input lines, send a 1 to the “read” line of the memory chip and wait the required few nanoseconds for the circuits to be hooked up and the source VDC to flow through to the output lines where you read your value. Rinse and repeat.
CPUs, GPUs and other chips in your computer nowadays have super fast direct interfaces with the system memory this whole process happens amazingly fast, but essentially what they’re doing is reading this word of RAM – then the next, then the next, until a programming instruction causes the CPU to jump to a completely different address of memory. But all software programs are instructions for the CPU to be done sequentially until a comparison is made that causes the CPU to “jump” to a completely different address in memory.
If you can accept that we can use transistors to make AND, OR, and NOT gates, then I can explain it quite well, I think. If not, or if you’re not innately familiar with the exact function of those gates, it will take some more explaining and a lot of diagrams.
So first off, if I use the NOT gate to invert the output of an OR gate, we get a NOR gate. A NOR B is only true if both A and B are false (or I guess since we’re dealing with electrical voltages, replace true with high and false with low). If I take two nor gates and one of their inputs is tied to the output of the other, we have what’s called an SR latch (short for set/reset). If you raise the voltage of the free input on one of the NOR gates, it doesn’t matter what the other input (tied to the output of the other gate), because if either input to a NOR is high then the output must be low. But if it’s low, then that feeds into the second NOR gates which now sees both low signals and raises its output high. This high output is fed back into the first NOR gates which continues to hold it low even after you remove the input on the free leg. This is stable and considered set.
The logic is symmetric, if you raise the free input on the second NOR gate, it will swap states and the high output will turn low and the low output will turn high, but this is also stable when the free input is removed. So we can set and reset the latch which allows us to store either a high or low signals as long as there’s power. The NOT gate on each OR requires power to work, so as soon as power is removed, you loose all the data stored in RAM. But, how do we access it?
Let’s say we have an address of 3 bits (meaning we can store up to 8 bits in RAM… Well, actually, we can just copy and paste the whole circuit 8 times for every bit and connect each of the 8 outputs to a different bit of the bus, giving us 8 bytes of data to store in RAM). So our address runs from low low low (000) to high high high (111 in binary).
Let’s say we want to access address 5 (101 in binary). The exact circuit we want to implement is B1 AND NOT B2 AND B3 AND Dx (where Bx are the 3 bits of the address and Dx are the data bits 1 through 8 for the 8 bits stored at that address… Btw, I’m choosing to start counting at 1 instead of 0). Notice that if the first part of the circuit (B1 AND B2 AND B3) is true, then the output becomes whatever the data is. Dx AND high is high if Dx is high and low if Dx is low. So we’re just reading the data. Notice that if B1 is not 1 or B2 is not 0 or B3 is not 1 then the AND condition is broken, and the output is always low regardless of what’s in Dx. So we will not be able to read whatever is stored in Dx unless the address is exactly 101.
Repeat this circuit for all 8 possible addresses and let’s.call these functions F1-F8. Then we just OR them all together (F1 OR F2 OR… OR F8). Since 7 out of the 8 functions will be forced low (because the address isn’t exactly right) the the output of this 8-way or gate is whatever the 8th circuit will be. And remember, that one cell that does match the address will just output whatever Dx is. So the output of our 8-way OR gate is Dx.
If you change the address you give to RAM, the value in that cell will be put on the output as fast as all the transistors can flip states. We don’t have to worry about waiting for the disk to spin to the right location because there is already a physical path to every single bit in RAM just waiting to be accessed. All the bits we don’t care about are ignored because the address selection circuit forces them low when the address doesn’t match.
RAM has cells. A cell is a “box” where you can have 1 or 0. To read a bit from RAM (or any other electronic memory) you first send an address. The number of bit you want to read. Then the memory chip responds with either 1 or 0.
To make things faster, bits are transferred in bulk, so, you don’t exactly read 1 bit, you read like 64 bits at once, via 64 lines. When it comes to addressing, you also give the word (a packet, like 64-bit packet) address. So at the address 0 you have first 64 bits, at 1 you have next 64 bits and so on.
Then how PHYSICALY the memory knows whether it’s 1 or 0 in the “box”?
It depends. If you’re asking about RAM in your PC, it’s DRAM – that stands for dynamic RAM. It means, that it can store information for a very short time measured in nanoseconds. If you want that memory to keep the data for a longer period, you need to refresh it.
Now – how does it work? A single cell, our “box” is a capacitor. Physically there are 2 conductors (pieces of metal) with an insulator between them. When you connect a voltage to those tiny pieces of metal, they become charged. So the voltage stays there for a little while, before it is discharged. So when it’s charged – you can assume you have 1. When discharged, no voltage, then it’s 0. Now when it’s discharged? When you READ it. You connect something to test if it’s charged, but then it’s getting discharged at the same time. That’s why you need to write after each read. You read 1, (was charged), so you recharge the cell again. Then again, the cells will discharge themselves because the insulator between the conductor is not perfect, and the charge is very small. That’s the reason the data in RAM is lost when you disconnect the power.
So, now you know why is there something like refresh, and refresh rate in DRAM. And why everything gets deleted when you shut the power off.
Now – you need to access a specific cell. How this is done? Similar like with the post office. Lets say you have an address on the envelope. You have a country, street address, postal code, and specific recipient name. The post office is responsible for “decoding” the address. First the mail is transported to another country, then to the destination city, then the appropriate post office in the city, then carried by a mailman to the specific address. In computer RAM – the address is first decoded by the computer hardware to be directed into specific RAM bank, then, on the RAM board to the specific chip, then in the chip to the specific cells.
In RAM you have also specify if you want read or write the data. That’s just one wire that either is set to 1 (some voltage) or 0 (no voltage).
Now in real world DRAM it’s all a bit more complex. The principle of operation is however roughly the same as I described. Instead of capacitors you have MOSFET transistors that happen to be the capacitors as well. Why transistors? It turns out they are just easier to produce and use in big, densely packed chips. The addressing is a bit more complex, also, modern RAM memory use a bunch of tricks to speed up the transfer.
TL;DR – DRAM consists of many small cells that can be charged and discharged. When they are charged, you read 1, when discharged you read 0. To access a specific cell you have to provide the cell number – the address. After reading each cell you have to write it again if it’s 1, because it gets discharged on reading. You have to read and write that kind of memory all the time, otherwise all cells will discharge and you lose data. To achieve that you have something called a memory controller doing just that.
By analogy, think of a library. They organize most books alphabetically on shelves, but also have a few displays in the front for popular books with maybe the theme of the month, with the books turned you can see their covers.
The main shelves are like a hard drive; very efficient for storing the maximum number of books, but to find a specific one, you have to take some time to find the right place where it is stored.
The temporary displays are like RAM; less space but you can find something on them extremely quickly.
Same applies for putting books back on the shelf. Much easier to replace on the temp display; it’s hard enough on the main shelves that we usually just leave it to the pros who work at the library.
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