Part of the answer here is that the circuit that has been manufactured on the silicon by the processes you mention has a defined structure (architecture) and a defined set of instructions that run on that structure.
There are many ‘departments’ within the architecture of a modern processor but their behaviour is planned and designed in.
When you want to get one out of bed, you have to follow the manufacturer’s plan for which signals to apply to which pins and in what order.
Most (all?) processors have at least one hardware reset pin that you must hold at either a 1 or 0 level whilst you apply the power and then release once you’re sure the power is up.
This pin is internally connected to the structure in such ways that the internal logic gates start off in a known state.
Once you have that state, the processor will have a pre-defined (by the designer/manufacturer) sequence of things that will happen when you release the hardware reset line.
Usually, the processor will assert a binary address on its address pins and expect to be presented with another binary code on its data pins. This code constitutes/correlates to its first ‘instruction’ from memory.
Everything beyond that is ‘software’ and the world’s your oyster…
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