If there are billions of transistors in a CPU, there is no chance that somebody designed every single one of them manually. Is their layout calculated or something?
In: 1270
Digital design engineer here.
The short answer is yes.
The long answer is: We describe the chip in a hardware design language (HDL) like VHDL or Verilog. It looks like software, but it’s actually describing hardware. Tools figure out how to turn this HDL description into standard cells (pre-defined building blocks supplied by your chip manufacturer. Things like AND, OR, NOT, buffers, flip flops etc.) and place and route them on the silicon.
Take for example this piece of code:
if (b && c)
a <= 1;
else
a <= 0;
It’s just an AND gate with b and c at the inputs. You could also write it as `a <= b & c;`. So the tool knows it needs an AND gate. It goes into its standard cell library and picks an AND gate. It knows it has to connect it to the b and c inputs so it places it close to those. This process works even for very complex logic. You can turn pretty much everything automatically into simple standard cells.
The standard cells are designed by hand and are different from manufacturer to manufacturer and technology (e.g. TSMC vs. Intel, 28nm vs 14nm). Memories are also designed by hand and then just scaled up.
On a larger scale you tell the tools where to put things on the silicon by assigning areas (partitions). You can copy&paste partitions. This is how you create identical CPU cores etc.
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