I am referring to the 10nm, 7nm and 5nm manufacturing processes used by Intel and TSMC, where TSMC is offering 5nm what ever that means.
I don’t understand semiconductor manufacturing, however searching and reading through some pages, it seems to indicate the chip density. I would love to understand what that means.
Also, why does it matter iff we are able to pack more chips into a small area? The CPU and chips are already quite small, so I cannot imagine a smart phone benefitting from it. Also doesn’t more chips in a smaller area mean more heat dissipation?
In: Engineering
> Also doesn’t more chips in a smaller area mean more heat dissipation?
Not until recently-ish.
There’s an observation called [Dennard Scaling](https://en.wikipedia.org/wiki/Dennard_scaling). In short, it says that a given _area_ of transistors (i.e. 2mm^2 ) will use the same amount of power, and thus dissipate the same amount of heat, regardless of the size of the transistors contained within.
Sadly, the observation started to break down around 2006, so nowadays we are running into significantly more issues with thermal dissipation.
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