I am referring to the 10nm, 7nm and 5nm manufacturing processes used by Intel and TSMC, where TSMC is offering 5nm what ever that means.
I don’t understand semiconductor manufacturing, however searching and reading through some pages, it seems to indicate the chip density. I would love to understand what that means.
Also, why does it matter iff we are able to pack more chips into a small area? The CPU and chips are already quite small, so I cannot imagine a smart phone benefitting from it. Also doesn’t more chips in a smaller area mean more heat dissipation?
In: Engineering
The nm rating refers to the width of the gate of a transistor:
[https://www.gaussianwaves.com/gaussianwaves/wp-content/uploads/2016/03/Ntype-MOSFET-width-length-dimensions.png](https://www.gaussianwaves.com/gaussianwaves/wp-content/uploads/2016/03/Ntype-MOSFET-width-length-dimensions.png)
Smaller transistors can run faster, with less power, and (should) cost less to produce. For something like a laptop, you run the smaller chips at the same speed as before to get power savings. For performance, you run the smaller chip at a higher clock. Plus the manufacturer is happy because they get more chips per silicon wafer.
Total transistor count is a separate subject. You can do things like make quad core cpus which vastly increases transistor count, but using the same size transistors.
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