# eli5: how are new microchips designed?

154 views

Whenever I watch videos on the insanely complex creation of microchips they also talk about how they are replicated to mass produce them, but skip over how the initial design is made. How is something so miniscule and complex designed or planned out?

In: 4

It’s just a bunch of transistors wired together, given enough time you could draw it out. However we have made circuits that carry out more complex functions, again, it’s just made out of transistors. When someone wants a microchip with that function, they can add that circuit onto what they are designing and make a bigger circuit that performs a more complex function. It’s the combination of decades of work in both computation and boolean algebra.

You can fit upwards of 100 billion transistors on a single chip, but a human doesn’t go through and dictate where each one goes or how they’re wired together, but rather we combine several sub assemblies that someone else designed.

It’s just a bunch of transistors wired together, given enough time you could draw it out. However we have made circuits that carry out more complex functions, again, it’s just made out of transistors. When someone wants a microchip with that function, they can add that circuit onto what they are designing and make a bigger circuit that performs a more complex function. It’s the combination of decades of work in both computation and boolean algebra.

You can fit upwards of 100 billion transistors on a single chip, but a human doesn’t go through and dictate where each one goes or how they’re wired together, but rather we combine several sub assemblies that someone else designed.

They are designed in hardware description languages such as Verilog and VHDL. These languages lack control flow (jumps and loops) available in software languages and the cost of operations is not like in software. For example in software “integer add” and “logical and” take the same time — one clock cycle. But in hardware “logical and” is implemented as 1-2 gates and propagation is measured in picoseconds while 16 bit integer add needs 80-400 gates depending on speed and the speed is tens times slower than “logical and.” So while you can use + in Verilog you want to avoid it. When they design a CPU they don’t use + for the arithmetic unit. They describe it using logical operators.

The languages allow you to design modules. You build and test bigger module out of smaller already tested modules. At the end they use software to translate the whole design into a graph of gates (such as NAND gates) and another software to actually layout the graph in 3D with the actual sizes of the elements specified.

They are designed in hardware description languages such as Verilog and VHDL. These languages lack control flow (jumps and loops) available in software languages and the cost of operations is not like in software. For example in software “integer add” and “logical and” take the same time — one clock cycle. But in hardware “logical and” is implemented as 1-2 gates and propagation is measured in picoseconds while 16 bit integer add needs 80-400 gates depending on speed and the speed is tens times slower than “logical and.” So while you can use + in Verilog you want to avoid it. When they design a CPU they don’t use + for the arithmetic unit. They describe it using logical operators.

The languages allow you to design modules. You build and test bigger module out of smaller already tested modules. At the end they use software to translate the whole design into a graph of gates (such as NAND gates) and another software to actually layout the graph in 3D with the actual sizes of the elements specified.

Initially chips were designed transistor by transistor. This was possible as they only had a few thousand. These transistors are arranged in useful groups like AND gates or a Registers. There are a ton of these that can be made out of transistors.

As chips became more complex the two were separated somewhat. You would have teams of engineers making the gates or slightly more complex things and then other teams of engineers making the actual chip logic out of those puzzle pieces.

Getting even more complex you now add in software that is designed to help assemble the parts into efficient designs.

Modern chips have billions to tens of billions of transistors. Engineers make the core parts and software scales those parts up to the billions needed.

This is all just designing the chip in software. Physically making the chip is even harder. Chips made with cutting edge technology have parts that are at the atomic level. A transistor is only 70 silicon atoms long and that info is likely outdated.

Initially chips were designed transistor by transistor. This was possible as they only had a few thousand. These transistors are arranged in useful groups like AND gates or a Registers. There are a ton of these that can be made out of transistors.

As chips became more complex the two were separated somewhat. You would have teams of engineers making the gates or slightly more complex things and then other teams of engineers making the actual chip logic out of those puzzle pieces.

Getting even more complex you now add in software that is designed to help assemble the parts into efficient designs.

Modern chips have billions to tens of billions of transistors. Engineers make the core parts and software scales those parts up to the billions needed.

This is all just designing the chip in software. Physically making the chip is even harder. Chips made with cutting edge technology have parts that are at the atomic level. A transistor is only 70 silicon atoms long and that info is likely outdated.

People used to place and route transistors on the chips by manually drawing them.

This worked OK when circuits were simple and only a relatively few transistors were required.

Modern CPUs can have billions of transistors. Manual creation is no longer possible if you want a chip to be designed and fabricated within a human lifetime–even if you had a huge skilled labor force.

Now days, there is a type of “programming language” called a hardware description language. With these you describe how you want your hardware to work (logic functions, memory, etc) and the synthesizer (“compiler”) generates the required hardware design to build it.

Instead of building each similar function you want everytime you can create objects to do specific things. These objects can in turn be created by simpler objects nested inside of it. For example you may want an ALU which does simple mathematic functions. It may require adders, multipliers, memory, etc–each of these could be separate objects you combine to produce a working ALU. You may then also use the adder object to increment a program counter object for example.

Designing a new chip then becomes a process of putting these objects together and defining the glue logic to connect them. We’re glossing over a lot of testing, fabricating, etc. You won’t be creating a new chip without a few million dollars to burn.