: How are manufacturers able to manufacture really small cpu transistors?
In: Technology
Take a look at a manufacturing process flow [like the following](https://en.wikipedia.org/wiki/File:Photolithography_etching_process.svg). This is an incredibly simplified representation of how a transistor is created/embedded within a single solid chunk of silicon. In real modern chips there are hundreds and hundreds of steps.
The first key ingredient is that there are certain chemicals whose properties change dramatically when exposed to light. Specifically we use chemicals that become “harder” when exposed to light (or you can accomplish the same thing with something that becomes “weaker”, it doesn’t matter). By “harder” we mean when this chemical is exposed to light it is far more resistant to being etched away by things like acid.
The second key ingredient is the ability to chemically either etch away solid material (like silicon) or to grow more (deposition) by exposure to a gas of the right chemicals. So you can “acid” etch away and “grow” deposit more by exposing your silicon wafer to a gas.
But how does that allow you to create an incredibly complex embedded circuit of literally [billions of transistors?](https://en.wikipedia.org/wiki/File:Diopsis.jpg). Well you combine the two in a process called photolithography.
First you apply a thin layer of “resist” chemical to the entire silicon wafer and then you exploit its special property by applying light through a kind of stencil called a [photomask](https://www.photo-sciences.com/wp-content/uploads/2018/06/1X-Master-primary-test-dice.jpg). By using this stencil you project a pattern of light onto the chip with light only landing in some place and not in others. Because of the special properties of the “resist” this means that some places become immune to etching and others don’t in the precise shape you applied. Then when you apply your “acid” etch you remove silicon material only according to your complex intended shape because places where the “resist” wasn’t removable (i.e. wasn’t exposed to light) it remains and protects the silicon from this exposure. A similar approach is applied when you need to add material.
So using these three approaches you can remove and add material according to a complex nano-sized floor plan by applying resist and selectively exposing it to light according to a certain pattern. Like, say, [this](http://2.bp.blogspot.com/-j8Z2sbXgETw/VUBNda3YYwI/AAAAAAAAAYM/QXGtUYx5meY/w1200-h630-p-k-no-nu/ProcessFlow2.png) to build up your transistors.
NOTE: It’s a common confusion to think that these hundreds of lithography steps must be applied PER transistor (so there would be hundreds of billions of steps), this isn’t how it works, rather all transistors in the complex network are laid out in a single mask simultaneously and all have their “step 1”, for example, done in the same “apply resist, apply photo-pattern, remove resist then etch or deposit” step.
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