How do calculators use logic gates to calculate?
In: Technology
You create logical circuits that do the operation you like.
In addition, you make a full adder and change as many as you need together for the calculation.
a full adder is added 3 bits, the carry from the previous adder, and one bit for each number. It output a result bit and a carry.
Carry is overflow from an operation
The operation is like you do when you add by hand on parer as you learned in school
35+26 can be split up. first adding 5 +7 to 12 so 2 out and 1 as a carry. Then you have 3+2 + 1( the carry from the precious operation= you get 6 out and 0 as a carry
The result is the output in reverse order so 2 and 6 is 62
If you do that with binary you can make the 3-bit addition with simple logic
[https://www.geeksforgeeks.org/full-adder-in-digital-logic/](https://www.geeksforgeeks.org/full-adder-in-digital-logic/)
Multiplication and division is harder buy you split than just like you did when you learn to do them in school
Using logic gates you can make a circuit called an [adder](https://en.wikipedia.org/wiki/Adder_(electronics)). An adder takes in inputs like other gates but it’s function is to produce outputs that effectively adds the inputs together, in a binary fashion. Here is the truth table for a half adder
Input 1| Input 2 | Carry | Sum | Explanation
:-:|:-:|:-:|:-:|:-:
0 | 0 | 0 | 0 | 0 + 0 = 0 and nothing to carry over.
1 | 0 | 0 | 1 | 1 + 0 = 1 and nothing to carry over.
0 | 1 | 0 | 1 | 0 + 1 = 1 and nothing to carry over.
1 | 1 | 1 | 0 | 1 + 1 = 0 and carry the 1 because we are adding in base 2.
If you allow for an adder to accept a carry as well as inputs 1 and 2, you have something called a full adder. The truth table for a full adder is a bit longer but you can check that wikipedia link to see it. If you chain a bunch of these adders together you can add big numbers. If you combine these circuit in other ways you can make other functions like subtraction, multiplication, and division.
Using a concept called CMOS design, you can turn any logical expression into a circuit. This means that if you want to build a 1-bit adder you can simply draw out a truth table
X Y | OUT
0 0 | 0
0 1 | 1
1 0 | 1
0 0 | 0
This is equivalent to an XOR gate and constitutes a 1-bit half adder. A full adder would add 1 input and 1 output for carry in and carry out. However, just looking at this truth table, you can derive the following expression by summing the conditions which result in Out being 1:
OUT = (!X)(Y) + (X)(!Y)
Once again, applying the CMOS design process to this equation will yield a circuit with this functionality, a 1-bit half adder.
The CMOS design process requires the use of P and N type transistors. P type transistors are active low, meaning they conduct when their gate voltage is below a threshold. Inversely, N type transistors are active high, meaning they conduct when their gate voltage is above a threshold. (Note, the actual voltage at play is Vgs, the difference between the gate and source voltages with respect to ground. This is the value that must exceed the threshold voltage. Alternatively, you may see Vsg> Vt for P type transistors. This is equivalent to Vgs<Vt.) To design a CMOS circuit, you must also invert the desired logical equation. This requires DeMorgan’s law, which states that !(AB) = !A+!B. When applied to the 1 bit half adder, you get the following:
(X+!Y)(!X+Y)
This simplifies to !X!Y + XY. This agrees when looking at the conditions for when OUT is 0.
From there, we design our circuit. The top half of the circuit consists of P type transistors which form the logic for Out and connects a positive voltage rail to our Out. The bottom half consists of N type transistors which form the logic for !Out and connects out to ground. When the inputs for Out are high, the voltage rail will connect to our output through our P type logic and output a 1. When the inputs for out arent correct, they must necessarily be the correct inputs for !Out, which activates our N type circuit and connects Out to ground, outputting a 0.
This process is indefinitely scalable and works on arbitrarily complex truth tables. There is a method for simplifying many-term logical expressions called a Karnaugh map or k-map if you’d like further reading on digital design. Also, look at “pull up” and “pull down” transistors for an explanation regarding why we use P type transistors for the top half and N type for the bottom half of the circuit.
http://nandgame.com/
At this link, you can build a computer (with instructions) from individual transistors to a whole calculator. Its also a pretty fun puzzle game. Doing is probably the best way to find out how something works.
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