So my question is this, if all modern day computer CPUs (central processing units) more or less have the same or similar clockspeeds from generation to generation as of late, and all run on a 64 bit architecture with an x86 instruction set, what about the processor is being altered or changed to yield performance gains from one gen to the next?
I understand that more cache is available, and transistor sizes are getting smaller and smaller, but at the end of the day, it is still running an x86 instruction set at 64 bits.
So last gens 4 core 4.5 GHz processor should run identically as quickly as a current gen 4 core 4.5 GHz processor theoretically – but that is not the case.
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The change from 32 to 64 bits did not increase the speed for the most program because it is relatively rare that the operation you do require a lot of operations with integers larger than 4 billion.
Runnin 64 bits operation can in fact be slower than 32 bit is the extra bits are not needed because you need to transfer more data from ram and the bandwidth is limited. It will also limit the number of variables you can fit in the cache memory.
So when you run 64 bits program lots of all integer operation still use the 32 bit operation because they are faster.
The change from 32 to 64 bits is the primary one of memory because not the OS can handle more than 4 gigabyte of RAM that results in around 3 gigabyte of ram. For X86 the change to 64 bit added some other stuff lite more register and that increased the speed.
The cock frequency is also not a good measurement because it only tells you how fast the clock is in the CPU it do not tell you how may the cycle an operation takes. I am not the case that a CPU performed 4.5 billion operations per second if it runs at 4.5 GHz
The Pentium 4 CPU had an architecture optimized for high clock speed. It decided each instruction up to 31 steps. One instruction could start each cycle so 31instruction is run at the same time ad different stag of completion
So it is like if you have an assembly line and move stuff from station to station. It takes time to move stuff between stations. Pentium 4 got to high clock frequency because the amount of work on each stop was quick but is used a lot of the time so just end and start each cycle.
It is also a problem is there there is a step where what is the next instruction depends on the output of a previous. A CPU would need to wait for it do be complete but that takes up to 31 cycles or have to guess so it has done some work if it guesses correctly but need to restart if it guesses incorrect. The impact of an incorrect guess is a lot larger if you split it up into more steps so the Core architecture that followed got a better performance at half the clock frequency.
A CPU today take instruction and break them apart into micro-operations. It then looks as them if they depend on each other. If instructions is independent they are executed at the same time. The CPU has multiple units that does a calculation that can be used at the same time
You can look at AMDs [Zen architecture overview](https://cdn.wccftech.com/wp-content/uploads/2016/08/AMD-Zen-CPU-Architecture-7.png) It can decode 4 instructions for each cycle. It can den send out 6 micro-ops to the part of the CPU that execute them.
It has 4 ALU that is the part that do integer maths and two AGU that handle the transfer to and from memory.
To that, you should add that CPUs today have multiple cores so multiple CPUs in the same chip
Today you have at least 4 core so that is like if you had four Pentium 4 CPUs because they only had a single core.
So there is a loss of improvement that has been done and it is about doing multiple instruction at the same time.
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