I was told that the CPU Clock is like a doorbell that informs the CPU about an upcoming program instruction. Each time an instruction is finished by the CPU, the clock can be “rang” again.
I understand that the CPU needs to take some steps to process an instruction. When all of these steps are completed, is this known as one “CPU cycle” and the amount of cycles per second is the clock rate measured in hertz? So would a clock rate of 3 GHz actually mean that the CPU can perform 3 billion instructions per second?
I find the CPU cycles and the clock rate a little difficult to understand. Because I’ve assumed that one cycle equals one processed instruction so 1Hz = 1 instruction but I’ve also read online that one instruction doesn’t always take one cycle.
So what exactly is one CPU cycle then and how does this correspond to the clock rate?
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You have a basic understanding of this, you are just missing a few holes. Firstly the CPU does not advance to the next cycle once it is finished with an instruction. The cycles are set by a clock that does not know anything about the instructions or data in the CPU. It just goes constantly at the same rate.
The clock signal is used to make sure all transistors do things at the same rate. Electricity takes time to go through wires and through transistors. So you need a way to say that one calculation is done and that you can now take your next input. This is what the clock cycles are for.
As you say each instructions have multiple steps to them, so called microinstructions. And the CPU does one microinstruction per cycle. If you look up in old processor manuals they list how many cycles each instruction takes. And this can vary depending on various conditions.
Things become more complex as you look at more modern processors. Each microinstruction only uses a few components of the CPU. If built correctly you might be able to start the next instruction before the previous one is done calculating as they can use different components within the same core. A very early example of this is that you can load the next instruction from memory while the current one is running, assuming it is done reading from memory. And speaking of memory you might start loading the data from memory needed by one instruction while the previous is still running, and then save the result of one instruction while the next is running. This way expensive memory operations might overlap with calculating data in the core so you can get twice the speed.
This was still early optimalization techniques we did in the 80s. Modern CPUs can run a handful of instructions in parallel on the same core. To speed things up it can even run instructions for two different threads. So when you ask how many clock cycles an instruction takes it can be complicated. It is easier to tell you how many clock cycles a block of code takes to execute.
>So would a clock rate of 3 GHz actually mean that the CPU can perform 3 billion instructions per second?
This means it can perform a maximum of 3 billion instructions if they’re really simple – moving contents of a data cell, addition, incrementations, etc. However, many tasks are more complex.
>I’ve also read online that one instruction doesn’t always take one cycle.
As an analogy, imagine a regular 8-digit calculator. You add two small numbers together – get a result immediately, easy.
However you can use it to add numbers that are bigger than 8 digits by splitting them in parts, like columnar addition in school. This will require running the addition operation multiple times and remembering to carry the one – you’re looking at several operations, extra memory cells, and overall more time spent.
The clock ticks at a mostly constant rate, which may be infrequently switched to save power. A cycle is the interval between ticks. Every beat advances the work being done by the CPU by one unit. The processor may not fetch a new instruction with every tick if it is busy. A complex instruction is often broken down into several simpler operations, or the processor might wait x number of ticks for data to arrive from memory. If the program needs to wait, the processor still gets the clock ticks, but does one or more do-nothing instructions.
> Because I’ve assumed that one cycle equals one processed instruction so 1Hz = 1 instruction but I’ve also read online that one instruction doesn’t always take one cycle.
It helps to know what a computer is doing. With a small number of the right electronic components (usually NAND gates in this case), you can add two binary digits simply by sending a pulse of electricity through the circuit. The answer just shows at the end of the circuit. If you want to add, say, a full 8-bit number (0-255), you can pack a bunch of these adders together in the right way. But again you send a pulse of electricity, you get the answer at the other end of the circuit.
This is one clock cycle, one instruction processed. You can do this with a breadboard and some transistors and such yourself, just solder everything together. A CPU is the same thing, it just has billions of those electronic components.
This one cycle equals one instruction thing is the goal of RISC chips. That means reduced instruction set. The processor is designed so it only has a small set of very simple instructions, and the goal is for each to take one clock cycle to complete, just like above.
Most processors are CISC, complex instruction set. They have a lot more instructions, some quite complex. A complex instruction will tell the processor to do something, and the processor may take many cycles to complete it.
So in general, consider clock cycle and rate to be the same thing.
Each instruction is kind of like an assembly line, running to the beat of a song. Each station on the assembly line has to get its work done in one beat. So you can have multiple things being worked on simultaneously. A CPU core is kind of like a factory, in that it can have multiple production lines, but you can also have multiple factories, which would be multiple cores.
How much work gets done per clock depends on the microarchitecture. This site has a table for how long each instruction takes(latency, measured in clock cycles), and how many can be started or finished per clock cycle(throughput, measured in instructions per clock cycle): https://uops.info/table.html
More info on that here: https://uops.info/background.html
Cycle is the activity. Rate is the number of activities per unit time. It’s that simple.
Instructions can happen at a rate more than, equal to, or less than the clock rate. A CPU has lots of parts which are able to do instructions in parallel and there are ways to do multiple instructions as a single other instruction.
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