The main reason is cost and performance.
Smaller transistors = more transistors per area = smaller silicon dies = more chips per silicon wafer.
If your chip was 1 square inch, you can only make about 78 per 12 inch silicon wafer. But if you could shrink the chip down to 1 square cm, you can make about 600 per wafer. So the latter has a much higher yield and is more profitable.
Also larger chips requires more wire distance for electricity to travel which means larger resistance and this can result in signal delays/worse performance.
Latest Answers