There is only so much room to put things. You could easily build a supercomputer the size of the ENIAC, but that isn’t going to fit in someone’s office or living room. In order to fit more power into something that can conveniently fit within the consumer space the effort goes into making things smaller so you can pack more power into a more practical space.
It also uses less material, lowering expenses. The more material you use, the higher the cost and the less you have to make other transistors.
The main reason is cost and performance.
Smaller transistors = more transistors per area = smaller silicon dies = more chips per silicon wafer.
If your chip was 1 square inch, you can only make about 78 per 12 inch silicon wafer. But if you could shrink the chip down to 1 square cm, you can make about 600 per wafer. So the latter has a much higher yield and is more profitable.
Also larger chips requires more wire distance for electricity to travel which means larger resistance and this can result in signal delays/worse performance.
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