For example i notice that the latest chips are 3 nm & below, & over the last decade i’ve seen it shrink little by little. What is it about this process that more money needs to be poured into each die shrink, & why couldn’t we just jump from 90nm to 3nm instead pf 65nm etc etc?
In: Engineering
First of all, the terms like 65nm, 32nm, 10nm, 3nm, etc., are purely marketing (fictional) terms which are a bit misleading. They no longer represent actual feature sizes like gate length or pitch. E.g., in the 3nm process actually has a gate pitch of ~ 48nm, and the upcoming 2nm process has a gate pitch of ~ 45nm.
At some point the industry should have just called it “generations” like 10th gen, 11th gen, 12th gen, etc.
So your question is like asking “why didn’t we just jump from the 10th generation to the 15th generation in one step?” Well, each generation has a ton of science, technology, engineering, financial, intellectual property licensing and sometimes even political considerations that needed years to be solved.
For example, conventional lithography uses optical light (at 193nm) but the new processes especially for 3nm and below will increasingly require extreme ultraviolet lithography (EUV) at 13.5nm. Currently there’s only one company in the world (ASML) that’s even capable of making EUV systems, and the technology behind it is considered so sensitive that it has national security implications.
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