How difficult is it to create silicon chips and why?


How difficult is it to create silicon chips and why?

In: 221

Silicon chips aren’t just silicon, we print on the chips using a process called photolithography, and this printing is incredibly precise. The details we lay on those chips are only a few atoms wide nowadays, and being able to get this level of precision is crazy hard.

The process isn’t very hard, but the equipment is very expensive, and you have to keep it in a clean room, which is very expensive to maintain. A piece of dust falling on a chip is like a mountain falling on a city, so the cleanroom has to keep as much dust out of there as possible, which requires constant air filtering. You can’t just repurpose any old factory to make chips.

First, we need silicon. Lucky for us, that’s the 2nd most common element in the Earth’s crust (1st is oxygen). We melt it down and make a giant cylindrical crystal out of it, which takes a lot of energy and time, and then slice that up into hundreds of wafers, and each wafer goes on to become several chips. As someone who works in the semiconductor field, I can tell you that the supply of wafers is currently our bottleneck. Unfortunately I don’t work on that end of things, so I’m not sure why, but I do know that we are in a wafer shortage that is causing the chip shortage.

Once those wafers are created, we have to build up the structures we want on the chips. The process is very heavily automated and requires little human intervention, but there are 4 main processes. Mapping, etching, deposition, and doping.

Mapping is when we take the wafer, coat it in a substance that we can cure with UV light, then we put the shapes of the structure we want on the wafer over it and shine UV light to cure anything not covered. We wash away what wasn’t cured, and now we have holes in that coating exactly where we want our structures to be. Once we are done building with that layer of the structure, we wash away the cured coating and are just left with the structure on our wafer. This is the only process that doesn’t affect the whole wafer at once, but it allows us to cover up parts of the wafer we don’t want a later process to happen to.

Etching is just using chemicals to dig away at anything exposed on the wafer’s surface. We can use different chemicals to etch different materials differently. Let’s say I have aluminum and silicon both exposed, but I only want to etch at the silicon, I could use a chemical that doesn’t interact with aluminum. And then any silicon I didn’t want to etch is already covered by the mapping we did before.

Deposition is pretty much the same, except we are coating the wafer with a new material. Usually either a metal, to act as a conductor, or putting down an oxide layer to act as an insulator. For that oxide layer, it’s really just like putting the wafer in a furnace so it can heat up an oxidize. For deposting a metal, it get vaporized and mixed in with an inert gas before getting blasted at the wafer. The gas just moves away after hitting the wafer, but the metal sticks.

Doping is a process that is really only done on silicon. Basically we lodge different atoms inside the silicon structure to change its properties. We had an atom.with 5 valance electrons for N doped silicon, and an atom with 3 valance electrons for P doped silicon. Silicon has 4 valance electrons, so in the crystal it binds with 4 of its neighbors, but everywhere the atom used for doping is, there will be either a loose electron, or a “hole” with thr absence of an electron. And these extra electrons and holes can move around through the silicon, giving the semiconductor new properties. This is essential for how transistors work. Millions of transistors can exist on a single chip because of how small we can make them.

All of these basic processes come together, and a finished wafer could have gone through hundreds or thousands of these steps before being finished. The problem is these processes need to be incredibly precise. Even being off by a single nanometer can ruin the chip. All of the etching and depositing takes place atoms at a time to ensure the process is even and only as thick as you want it because you can’t just go in with tweezers and fix your mistakes.

The machines also require a lot of maintenance. We test each chamber of each tool every few days, and some chambers can have several tests, and if it fails even one of those, the chamber can’t be used to process any wafers until its fixed and passing said test.

It’s all a delicate ballet to get chips made, and while the process is not that complicated, the cost and fragility make it hard to expand the volume of chips being produced.

To learn how to design chips vs how fabs make them Have a look at efabless and Googles open source silicon initiative

The difficulty depends on the “minimum feature size,” which is basically the size of individual transistors and wires on the chips. This differs among different chip types and their target markets. The most advanced chips, like PC CPUs and graphics processors, have transistor sizes of only a few nanometers, which demands the most expensive and difficult manufacturing in the world. Here are some of the challenges:

– Highly pure materials and [processing environment]( The air in the facility must be filtered for tiny particles. Some areas are so clean that humans can’t enter; everything in those rooms is done with robotics. The temperature, humidity, and even lighting are tightly controlled.

– Chemical processes involving [ultra-pure chemicals and high-vacuum, cryonic environments]( Other processes use very toxic, hazardous chemicals. And much of this work is slow, with sequences of repeated reactions, crystalization steps that take days, etc.

– Extremely precise robotic alignment and high-frequency laser lithography. The [key machine]( used to align a chip wafer for image projection costs about $150 million.

– Complex quality assurance. Defects are inevitable, and the company must recoup costs by determining which chips can still be sold with some disabled features

In addition to these technical difficulties, chip manufacturing has to overcome business challenges. The cost of building a modern fabrication facility ranges from three to nine *billion* dollars, and could rise to $20 billion within the next decade. In many countries, tax law – in particular the capital depreciation schedule – doesn’t account for the speed of evolution in the industry. This makes it expensive to idle the machines, so when next-gen technology arrives they must be quickly adapted for lower-end chip markets. Because of this, the industry doesn’t have much vertical integration. Instead, fabrication companies lease use of their facilities to chip design firms like Intel, AMD, Nvidia, etc. That allows for flexible arrangements that keep their machines continually busy.